1.Field of The Invention
This invention is directed toward methods for fabricating polycrystalline thin films. More particularly, the invention is directed toward optimized solid phase crystallization of plasma enhanced chemical vapor deposited amorphous silicon thin films as a means for obtaining, with a low thermal budget, polycrystalline silicon thin films comprising larger grain sizes and smother surfaces.
2. Background Of The Art
Polycrystalline silicon (poly-Si) thin film transistors are currently receiving considerable attention in the art for use in active matrix flat panel display technology. This application is discussed in the literature by I-Wie Wu, Solid State Phenomena, vols. 37-38 (1994), pp. 553-564, by K. Nakazawa and K. Tanaka, Journal of Applied Physics, 68 (3), 1990, pp. 1029, by T. Kretz et al, Solid State Phenomena, vols. 37-38 (1994), pp. 311-316, and by J. Guillemet et al, Solid State Phenomena, vols. 37-38 (1994), pp. 293-298.
In the fabrication of poly-Si thin film, it is desirable, from a performance viewpoint, to maximize the grain size and to maximize the smoothness of the surface. From technical, operational and economic viewpoints, it is desirable to minimize the thermal budget in the fabrication of the thin films.
Grain boundaries within a poly-Si film generally deteriorate the electronic properties of the film. It is well known in the prior art that these grain boundaries can be passivated by hydrogen, but the development of the present invention revealed that this hydrogen can be unstable in severe environmental conditions. It is, therefore, desirable to have as few grain boundaries as possible in many applications of polycrystalline materials. In order to reduce the number of grain boundaries present in the film, large grain sizes are desired, and thereby improve electronic properties of the poly-Si films.
The crystallization of thin deposited amorphous silicon films, to obtain thin poly-Si film, requires a relatively large thermal budget. This limits the maximum throughput of the fabrication of devices and restricts the range of substrates that can be used. Therefore, a reduction in crystallization thermal budget is necessary in the manufacturing of low cost, large area devices such as poly-Si thin film transistors for applications such as flat panel displays and for solar cell arrays.
The solid phase crystallization (SPC) of plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) thin films is a promising approach for obtaining polycrystalline silicon (poly-Si) films, as opposed to depositing them directly, with the goal of obtaining larger grains and smother surfaces, and also with a lower thermal budget. Solid phase crystallization offers advantages over prior art laser crystallization that include smoother poly-Si surfaces, higher thermal throughputs for rapid solid phase crystallization, and better grain uniformity. On the other hand, thin film transistors fabricated from laser crystallized a-Si have much higher mobilities than those fabricated from solid phase crystallized a-Si, which is a direct result of the lower intergrannular defect density as shown by T. E. Dyer, Solid State Phenomena, vols. 37-38 (1994). pp. 329, and by T. Sameshima, Journal of Applied Physics, 76 (11), 1990, pp. 7737.
Based upon the prior art, it is of great interest to study the SPC kinetics of PECVD deposited a-Si thin films, and from this study develop methods for modifying the kinetics to improve the poly-Si quality for thin film transistor applications, and also to reduce the thermal budget required to fabricate the films.
An object of the present invention is to provide methods for varying PECVD depositional parameters to optimize quality of poly-Si film for thin film transistor applications and to minimize thermal budget.
Another object of the invention is to provide methods for using both furnace annealing and rapid thermal annealing or rapid thermal processing of the deposited film in order to optimize the quality of poly-Si film for thin film transistor applications and to minimize thermal budget, where thermal budget is define as the product of annealing temperature and annealing time.
Yet another object of the invention is to provide methods for pre-annealing surface treatments to optimize quality of poly-Si film for thin film transistor applications and to minimize thermal budget.
Another object of the invention is to enhance rapid thermal annealing process with a source of high energy, high intensity photon radiation thereby further reducing the required thermal budget.
Still another object of the present invention is to provide apparatus and methods for crystallization of selected regions of initially amorphous thin films.
Yet another object of the invention is to maximize grain size and minimize thermal budget of polycrystalline file by the introduction of seed nuclei sites using selective crystallization techniques.
There are other objects of the present invention which will become apparent in the following disclosure.